2.5D/3D-IC Forum 2014

(Note:  Presentations are only available to conference delegates. Presentations not linked are not available.)

Supported by:              



Sponsored by:            


Session Chair: 

Dr. Surya Bhattacharya, Director, Industry Development (TSV), A*STAR Institute of Microelectronics



  1. Time




  09:30 - 09:40    


Welcome Remarks by Session Chair


  09:40 - 10:05


3D Packaging Technologies and Industry Trends (PDF)

Ms. Rozalia Beica, CTO,  Yole Développement


  10:05 - 10:30


3D IC Equipment and Process: Challenges and Solutions (PDF not available)

Mr. Yuichi Abe, General Manager, Assemble &  Test System Business Unit, Tokyo Electron Limited


  10:30 - 10:55


Sub-20nm 3D IC Packaging Challenges (PDF not available)

Mr. Ramakanth Alapati, Senior Manager, Package Architecture and Customer Technology Group,  GLOBALlFOUNDRIES U.S. Inc.


  10:55 - 11:05


Break & Networking Time


  11:05 - 11:30


Heterogeneous 3D Integration Technology based on Reconfigured Wafer-to-Wafer Bonding (PDF not available)

Dr. Mitsumasa Koyanagi, Professor, Tohoku University


  11:30 - 11:55


Orthogonal Scaling to extend Computing into the Cognitive Era

KEYNOTE: Dr. Subramanian S. Iyer , IBM Fellow, Mcroelectronics Division, (PDF not available)

IBM Systems & Technology Group


  11:55 - 12:20


Challenges for the Development of Faster TSV and Cu/Sn Pillar Plating Chemistries (PDF)

Dr. Bernd Roelfs, Global Product Manager,  Atotech Deutschland GmbH


  12:20 - 12:45


2.5/3D Integration –Moore’s Law and Beyond (PDF)

Dr. Yoon Seung Wook, Director, STATS chipPAC Ltd.


  12:45 - 13:45


Lunch & Networking Time


  13:45 - 14:10


Making 2.5D/3D IC A Reality:  A Market and Technology Update (PDF)

Ms.  E. Jan Vardaman, President,  TechSearch International Inc.


  14:10 - 14:35


Manufacturability Considerations in 2.5D (PDF not available)

Mr. Sitaram Arkalgud, Vice President of 3D Technology,  Invensas Corporation


  14:35 - 15:00


Highly reliable Chip‐to‐ Chip Cu wiring technologies for 3D/2.5D interconnection (PDF)

Dr. Tomoji Nakamura,  Senior Expert, Devices and Materials Lab, Fujitsu Laboratories Ltd.


  15:00 - 15:25


Cost Effective Implementation of 2.5D /3D ICs (PDF)

Dr. Surya Bhattacharya, Director of  Industry Development (TSI),          

A*STAR Institute of Microelectronics


  15:25 - 15:35


Break & Networking Time


  15:35 - 16:00


Endpoint Controlled Via Reveal Etch Processes Targeting Improved CoO  (PDF)

Mr. Richard Barnett, Etch Products Marketing Manager, SPTS Technologies Ltd.

  16:00 - 16:25


Electrodeposition In The 3D World (PDF not available)

Dr. Steve Mayer, Corporation Fellow,  Lam Research


  16:25 - 16:50


Wafer Level Fan-Out as Fine-Pitch Interposer (PDF)

Mr. Steffen Krohnert, Director of Technology Technical Marketing,  Nanium S.A.


  16:50 - 17:15


Enabling Technologies for 2.5D Interposer Manufacturing (PDF)

Dr. Thorsten Matthias, Director of Business Development,  EV Group (EVG)


  17:15 - 17:20


Closing Remarks